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Informazioni sui prodotti
Panoramica del prodotto
74VHCT125AFT(BJ) is a CMOS digital silicon monolithic IC. It is a high speed CMOS quad bus buffer (non-inverted 3-state outputs) fabricated with silicon gate C²MOS technology. It achieves the high speed operation similar to equivalent bipolar schottky TTL while maintaining the CMOS low power dissipation. It requires the 3-state control input active-low G to be set high to place the output into the high impedance state. The input voltage is compatible with TTL output voltage. This device may be used as a level converter for interfacing 3.3V to 5V system. Input protection and output circuit ensure that 0 to 5.5V can be applied to the input and output pins without regard to the supply voltage. There structure prevents device destruction due to mismatched supply and input/ output voltages such as battery back-up, hot board insertion, etc. It is pin and function compatible with the 74 series (ACT/HCT/AHCT etc.) 125/126 type.
- Power down protection is provided on all inputs and outputs
- Balanced propagation delays: tPLH ≈ tPHL, AEC-Q100 (Rev. H) qualified
- Compatible with TTL input: VIL = 0.8V (max), VIH = 2V (min)
- Supply voltage range from 4.5V to 5.5V
- Input leakage current is ±0.1µA max at (VIN = 5.5V or GND, 0 to 5.5V, Ta = 25°C)
- Quiescent supply current is 4µA max at (VIN = VCC or GND, Ta = 25°C)
- Propagation delay time is 3.8ns typ at (5.0 ±0.5V, CL = 15pF, Ta = 25°C, input: tr = tf = 3ns)
- Input capacitance is 4pF typ at (Ta = 25°C, input: tr = tf = 3ns)
- TSSOP14B package
- Operating temperature range from -40°C to 125°C
Specifiche tecniche
Buffer, Non Invertente
TSSOP-B
14Pin
5.5V
74125
125°C
-
To Be Advised
0
TSSOP-B
4.5V
74VHC
-40°C
AEC-Q100
AEC-Q100
Documenti tecnici (1)
Legislazione e ambiente
Paese in cui si è svolta l'ultima parte più significativa del processo produttivoPaese d'origine:Japan
Paese in cui si è svolta l'ultima parte più significativa del processo produttivo
RoHS
RoHS
Certificato di conformità del prodotto