8SLVP2108ANLGI/W

8SLVP2108ANLGI/W is a high-performance differential dual 1:8 LVPECL fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. Guaranteed output-to-output and part-to-part skew characteristics make the 8SLVP2108 ideal for those clock distribution applications demanding well-defined performance and repeatability. Two independent buffers with eight low skew outputs each are available. The integrated bias voltage references enable easy interfacing of single-ended signals to the device inputs. The device is optimized for low power consumption and low additive phase noise. Differential PCLKA, nPCLKA and PCLKB, nPCLKB pairs can accept the following differential input levels: LVDS, LVPECL, CML.

• Two 1:8, low skew, low additive jitter LVPECL fanout buffers
• Two differential clock inputs
• 2GHz maximum input clock frequency
• 15ps typical output bank skew (VCC = 3.3V ± 5% or 2.5V ± 5%, VEE = 0V, TA = -40 to 85°C)
• 255ps typical propagation delay (VCC = 3.3V ± 5% or 2.5V ± 5%, VEE = 0V, TA = -40 to 85°C)
• 54fs maximum low additive phase jitter, RMS (fREF = 156.25MHz, VPP = 1V, 12 to 20MHz, VCC = 3.3V)
• 3.135 to 3.465V power supply voltage range (VCC = 3.3V ± 5%, VEE = 0V, TA = -40°C to 85°C)
• 143mA maximum device current consumption
• 48 lead VFQFN, ambient operating temperature range from -40°C to +85°C