5PB1104CMT18

5PB1104CMT18 is a high performance LVCMOS clock buffer. It has an additive phase jitter of 50fs RMS. This supports a synchronous glitch-free output enable (OE) function to eliminate any potential intermediate incorrect output clock cycles when enabling or disabling outputs. Typical application includes industrial applications, automotive, radar, lidar, and other applications.

• High-performance 1:2, 1:4, 1:6, 1:8, 1:10 LVCMOS clock buffer
• <lt/> 50ps very low pin-to-pin skew, 3.3V tolerant input clock, 200MHz max input frequency (VDD=1.8V±5%)
• 12mA typical operating supply current (100MHz, no load, 25°C, VDD = 1.8V ±5%)
• Integrated serial termination for 50 ohm channel
• Operating voltage range from 1.71 to 1.89V (VDD = 1.8V ±5%)
• Output high voltage is 1.4V (minimum, OH = -5mA, VDD = 1.8V ±5%)
• Nominal output impedance is 50 ohm (typical, VDD = 1.8V ±5%)
• Input capacitance is 5pF (typical, VDD = 1.8V ±5%, CLKIN, 1G pin)
• Input high leakage is 5µA (maximum, VIN = VDD, VDD = 1.8V ±5%)
• 8-DFN package, temperature range from -40° to +125°C (AEC-Q100 qualified, automotive grade 1)