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Quantità | |
---|---|
5+ | € 0,296 |
10+ | € 0,202 |
100+ | € 0,155 |
500+ | € 0,136 |
1000+ | € 0,134 |
5000+ | € 0,106 |
Informazioni sui prodotti
Panoramica del prodotto
74LVC08APW-Q100,11 is a quad 2-input AND gate. Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of this device as translator in mixed 3.3V and 5V applications. This product has been qualified to the automotive electronics council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. It complies with JEDEC standard (JESD8-7A (1.65V to 1.95V), JESD8-5A (2.3V to 2.7V), JESD8-C/JESD36 (2.7V to 3.6V). It features ESD protection (HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000V, CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000V).
- 5V tolerant inputs for interfacing with 5V logic
- Wide supply voltage range from 1.65V to 3.6V
- CMOS low power consumption
- Direct interface with TTL levels
- Input leakage current is ±0.1μA typ at (VCC = 3.6V;VI= 5.5V or GND, -40°C to +85°C)
- Supply current is 0.1μA typ at (VCC = 3.6V;VI=VCC or GND;IO = 0A, -40°C to +85°C)
- Input capacitance is 4pF typical at (VCC = 0V to 3.6V;VI= GND to VCC, -40°C to +85°C)
- Propagation delay is 11ns typical at (VCC = 1.2V, -40°C to +85°C)
- Operating temperature range from -40°C to +125°C
- TSSOP14 package
Avvertenze
Market demand for this product has caused an extension in leadtimes. Delivery dates may fluctuate. Product exempt from discounts.
Specifiche tecniche
Porta AND
2Inputs
TSSOP
Serie 74LVC
1.65V
Senza Input di Trigger Schmitt
-40°C
AEC-Q100
No SVHC (21-Jan-2025)
quattro elementi
14Pin
TSSOP
74LVC
3.6V
50mA
125°C
MSL 1 - Non Limitata
Documenti tecnici (2)
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Legislazione e ambiente
Paese in cui si è svolta l'ultima parte più significativa del processo produttivoPaese d'origine:Thailand
Paese in cui si è svolta l'ultima parte più significativa del processo produttivo
RoHS
RoHS
Certificato di conformità del prodotto