Quantity | Price (ex VAT) |
---|---|
260+ | €6.330 |
Product Information
Product Overview
8T39210NLGI is a high-performance clock fanout buffer. The input clock can be selected from two differential inputs or one crystal input. The internal oscillator circuit is automatically disabled if the crystal input is not selected. The crystal pin can be driven by a single-ended clock. The selected signal is distributed to ten differential outputs that can be configured as LVPECL, LVDS, or HCSL outputs. In addition, an LVCMOS output is provided. All outputs can be disabled into a high-impedance state. The device is designed for a signal fanout of high-frequency, low phase-noise clock and data signal. The outputs are at a defined level when inputs are open or tied to ground.
- Two differential reference clock input pairs
- Differential input pairs accept differential input levels: LVPECL, LVDS, HCSL, HSTL or single ended
- Two banks, each has five differential output pairs that can be configured as LVPECL, LVDS, or HCSL
- One single-ended reference output with synchronous enable to avoid clock glitch
- Output skew is 81ps (maximum, GND = 0V, TA = -40°C to 85°C)
- Power supply voltage range from 2.37 to 3.46V (VDDOA = VDDOA = 2.5V ±5, GND = 0V, TA = -40 to 85°C)
- Output power voltage range from 2.37 to 3.46V ((VDDOA = VDDOA = 2.5V ±5, GND = 0V, TA = -40 to 85°C)
- Differential output voltage range from 435 to 570mV (VDDOA=VDDOB=3.3V±5%, GND=0V, TA = -40 to 85°C)
- Offset voltage range from 1.16 to 1.375V (VDDOA = VDDOB = 3.3V±5%, GND = 0V, TA = -40 to 85°C)
- 48 pin VFQFPN package, operating temperature range from -40°C to 85°C
Technical Specifications
Fanout Clock Buffer
10Outputs
3.465V
48Pins
85°C
-
1.5GHz
3.135V
VFQFPN-EP
-40°C
-
No SVHC (21-Jan-2025)
Technical Docs (2)
Legislation and Environmental
Country in which last significant manufacturing process was carried outCountry of Origin:Taiwan
Country in which last significant manufacturing process was carried out
RoHS
RoHS
Product Compliance Certificate