8P34S1208NBGI8

8P34S1208NBGI8 is a high-performance differential LVDS fanout buffer. The device is designed for the fanout of 1PPS signals or high-frequency, very low additive phase-noise clock and data signals. Guaranteed output-to-output and part-to-part skew characteristics make the 8P34S1208 ideal for those clock distribution applications demanding well-defined performance and repeatability. Two selectable differential inputs and eight low skew outputs are available. The integrated bias voltage reference enables easy interfacing of single-ended signals to the device inputs. The device is optimized for low power consumption and low additive phase noise.

• Eight low skew, low additive jitter LVDS output pairs
• Two selectable, differential clock input pairs
• Differential CLK, nCLK pairs can accept the following differential input levels: LVDS, CML
• Maximum input clock frequency of 1.5GHz
• LVCMOS/LVTTL interface levels for the control input select pin
• Low propagation delay variation across temperature for 1PPS applications
• 20ps typical output skew, 400ps maximum propagation delay
• Low additive phase jitter, RMS; fREF = 156.25MHz, VPP = 1V, 12KHz–20MHz: 34fs (typical)
• Power supply voltage range from 1.71 to 1.89V (VDD = 1.8V ±5%, TA = -40°C to +85°C)
• 28pin VFQFPN package, operating temperature range from -40°C to +85°C