S25FL127SABNFI103

S25FL127SABNFI103 is a FL-S flash non-volatile memory using MIRRORBIT™ technology - that stores two data bits in each memory array transistor, eclipse architecture - that dramatically improves program and erase performance, 65-nm process lithography. This device connects to a host system via an SPI. This multiple width interface is called SPI multi-I/O or MIO. The Eclipse architecture features a page programming buffer that allows up to 128 words (256 bytes) or 256 words (512 bytes) to be programmed in one operation, resulting in faster effective programming and erase than prior generation SPI program or erase algorithms. Executing code directly from flash memory is often called eXecute-in-Place (XIP).

• 128Mb density, 0.065µm MIRRORBIT™ process device technology, 108MHz speed
• 8-contact WSON 6 x 5mm package type, industrial temperature range from -40 to +85°C
• SOIC8/WSON footprint
• CMOS 3.0V core, SPI clock polarity and phase modes 0 and 3
• Normal, fast, dual, quad, common flash interface (CFI) data for configuration information
• Programming (0.8MBps), quad-input page programming (QPP) for slow clock systems
• Automatic ECC -internal hardware error correction code generation with single bit error correction
• Cycling endurance, 100000 program-erase cycles per sector, minimum
• Data retention, 20 year data retention, minimum
• One-time programmable (OTP) array of 1024bytes, advance sector protection